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230328s2023 sz a b 001 0 eng d |
| 020 |
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|a 3031180224
|q paperback
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|a 9783031180224
|q paperback
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| 035 |
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|a (OCoLC)1374130404
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| 040 |
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|a COO
|b eng
|e rda
|c COO
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| 050 |
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4 |
|a QA76.9.A73
|b G66 2023
|
| 082 |
0 |
4 |
|a 004.22
|2 23
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| 100 |
1 |
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|a Goossens, Bernard,
|e author
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| 245 |
1 |
0 |
|a Guide to computer processor architecture :
|b a RISC-V approach, with high-level synthesis / c by Bernard Goossens
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| 264 |
|
1 |
|a Cham, Switzerland :
|b Springer,
|c [2023]
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| 300 |
|
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|a xxv, 438 pages :
|b illustrations (chiefly color) ;
|c 24 cm
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| 336 |
|
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|a text
|2 rdacontent
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| 337 |
|
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|a unmediated
|2 rdamedia
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| 338 |
|
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|a volume
|2 rdacarrier
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| 490 |
1 |
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|a Undergraduate topics in computer science,
|x 1863-7310
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| 504 |
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|a Includes bibliographical references and index
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| 650 |
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0 |
|a Computer architecture
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| 650 |
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0 |
|a RISC microprocessors
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| 650 |
|
7 |
|a Computer architecture
|2 fast
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| 650 |
|
7 |
|a RISC microprocessors
|2 fast
|
| 776 |
0 |
8 |
|z 9783031180231
|i eBook
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| 830 |
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|a Undergraduate topics in computer science
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| 999 |
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|m guide_to_computer_processor_architecturerisc_v_approach_with_high_leve_____2023_______sprina________________________________________goossens__bernard__________________p
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